add patch for daiteq streaming in RV64, correct test for swar in RV64

Signed-off-by: Roman Bartosinski <roman@daiteq.com>

patches/0002-add-diateq-streaming-CSR-for-RISCV-target.patch

+From 47d85fa8471d1a3abd2d38aaf025005381c84f3f Mon Sep 17 00:00:00 2001
+From: Roman Bartosinski <roman@daiteq.com>
+Date: Thu, 20 Mar 2025 09:06:59 +0100
+Subject: [PATCH] add diateq streaming CSR for RISCV target
+
+Signed-off-by: Roman Bartosinski <roman@daiteq.com>
+---
+ include/opcode/riscv-opc.h | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
+index 92c5b60..1ad5786 100644
+--- a/include/opcode/riscv-opc.h
++++ b/include/opcode/riscv-opc.h
+@@ -1154,6 +1154,8 @@
+ #define CSR_SWARCTRLSTAT  0x400
+ #define CSR_SWARACC       0x410
+ #define CSR_SWARACCHI     0x411
++#define CSR_DAI_ISTREAM   0x418
++#define CSR_DAI_OSTREAM   0x419
+ #endif /* RISCV_ENCODING_H */
+ #ifdef DECLARE_INSN
+ DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32)
+@@ -1576,6 +1578,9 @@ DECLARE_CSR(swarctrlstat, CSR_SWARCTRLSTAT, CSR_CLASS_I, PRIV_SPEC_CLASS_NONE, P
+ DECLARE_CSR(swaracc, CSR_SWARACC, CSR_CLASS_I, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_DRAFT)
+ DECLARE_CSR(swaracchi, CSR_SWARACCHI, CSR_CLASS_I_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_DRAFT)
+ 
++DECLARE_CSR(daistreamin, CSR_DAI_ISTREAM, CSR_CLASS_I, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_DRAFT)
++DECLARE_CSR(daistreamout, CSR_DAI_OSTREAM, CSR_CLASS_I, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_DRAFT)
++
+ DECLARE_CSR(mcycle, CSR_MCYCLE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_DRAFT)
+ DECLARE_CSR(minstret, CSR_MINSTRET, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_DRAFT)
+ DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_DRAFT)
+-- 
+2.30.2
+

tests/riscv/test_swar.s

@@ -8,19 +8,23 @@ test_swar:
     swar        t0, t1, 0x123
     swari       t0, t1, 0x123
     
-    swarcc      t0, t1, t2
-    swarcc      t0, t1, 0x123
-    swarcci     t0, t1, 0x123
+#    swarcc      t0, t1, t2
+#    swarcc      t0, t1, 0x123
+#    swarcci     t0, t1, 0x123
 
     csrw   swarctrlstat, t0
-    csrw   swaracc0, t0
-    csrw   swaracc0hi, t0
-    csrw   swaracc1, t0
-    csrw   swaracc1hi, t0
-    csrw   swaracc2, t0
-    csrw   swaracc2hi, t0
-    csrw   swaracc3, t0
-    csrw   swaracc3hi, t0
+    csrr   t0, swarctrlstat
+    csrw   swaracc, t0
+    csrr   t0, swaracc
+    csrw   swaracchi, t0
+    csrr   t0, swaracchi
+
+    csrw   daistreamin, t0
+    csrr   t0, daistreamin
+    csrw   daistreamout, t0
+    csrr   t0, daistreamout
+
+    csrr   t0, minstret
 
 .section .rodata
 swar_a: