leon-myuart.h
14.7 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
/* -----------------------------------------------------------------------------
* Copyright (C) 2015-2018 daiteq s.r.o. http://www.daiteq.com
*
* This program is distributed WITHOUT ANY WARRANTY; without even
* the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE.
*
* -----------------------------------------------------------------------------
* Filename : leon-myuart.h
* Authors : Martin Danek
* Description : leon2 uart I/O routines
* Release :
* Version : 1.0
* Date : 10.05.2018
* -----------------------------------------------------------------------------
*/
#ifndef LEON_MYUART_H
#define LEON_MYUART_H
/* Board definitions */
#define BSP_SIM 0
#define BSP_LEON2_MT 1
#define BSP_AT697 2
#define BSP_GR712RC 3
#define BSP_GR740 4
#define BSP_LEON4_N2X 5
#define BSP_RTEMS 10
#ifndef USEDBSP
#define USEDBSP BSP_LEON2_MT
#endif
/* *************** */
/* UART CONSTANTS */
/* */
#define DISABLE 0x0
#define ENABLE_RX 0x1
#define ENABLE_TX 0x2
#define RX_INT 0x4
#define TX_INT 0x8
#define EVEN_PARITY 0x20
#define ODD_PARITY 0x30
//
// baud_rate = F_clk /(8 * scaler_reload_value + 1)
// scaler_reload_value = ((F_clk/baud_rate) - 1) / 8
//
#define SCALER_RELOAD_VALUE_40_38400 0x80 /* 40MHz 38400bps */
#define SCALER_RELOAD_VALUE_25_9600 0x146 /* 100MHz 38400bps 25MHx 9600bps*/
#define SCALER_RELOAD_VALUE_48_9600 0x271 /* 48MHz 9600bps GR712RC */
#define SCALER_RELOAD_VALUE_50_115200 0x036 /* 50MHz 115200bps */
#define SCALER_RELOAD_VALUE_51_115200 0x038 /* 51.2821MHz 115200bps */
#define SCALER_RELOAD_VALUE_75_115200 0x051 /* 50MHz 115200bps */
#define SCALER_RELOAD_VALUE_100_115200 0x06C /* 100MHz 115200bps */
#define SCALER_RELOAD_VALUE_150_9600 0x7A1 /* 150MHz 9600bps */
#define SCALER_RELOAD_VALUE_150_115200 0xA3 /* 150MHz 115200bps */
#define SCALER_RELOAD_VALUE_200_9600 0xA2C /* 200MHz 9600bps */
#define SCALER_RELOAD_VALUE_200_115200 0x0D9 /* 200MHz 115200bps */
#define SCALER_RELOAD_VALUE_250_115200 0x10F /* 250MHz 115200bps */
#define SCALER_RELOAD_VALUE_SIM 0x0a /* simulation */
#define LOOP_BACK 0x80
#define FLOW_CONTROL 0x40
// The following defines the bits in the LEON UART State Registers.
#define STAT_DR 0x00000001 /* Data Ready */
#define STAT_TS 0x00000002 /* TX Send Register Empty */
#define STAT_TH 0x00000004 /* TX Hold Register Empty */
#define STAT_BR 0x00000008 /* Break Error */
#define STAT_OE 0x00000010 /* RX Overrun Error */
#define STAT_PE 0x00000020 /* RX Parity Error */
#define STAT_FE 0x00000040 /* RX Framing Error */
#define STAT_ERR 0x00000078 /* Error Mask */
// The following defines the bits in the LEON UART Ctrl Registers.
#define CTRL_RE 0x00000001 /* Receiver enable */
#define CTRL_TE 0x00000002 /* Transmitter enable */
#define CTRL_RI 0x00000004 /* Receiver interrupt enable */
#define CTRL_TI 0x00000008 /* Transmitter interrupt enable */
#define CTRL_PS 0x00000010 /* Parity select */
#define CTRL_PE 0x00000020 /* Parity enable */
#define CTRL_FL 0x00000040 /* Flow control enable */
#define CTRL_LB 0x00000080 /* Loop Back enable */
#define CTRL_EC 0x00000100 /* External clock enable */
#define APBUART1_BASE_LEON2 0x80000070 /* LEON2 */
#define APBUART1_BASE_GR712RC 0x80000100 /* LEON3-FT GR712RC */
#define APBUART1_BASE_GR740 0xFF900000 /* GR740 */
#define APBUART1_BASE_LEON4_N2X 0xFF900000 /* LEON4-N2X */
//
#define APBUART1_DATA APBUART1_BASE
#define APBUART1_STATUS APBUART1_BASE+0x4
#define APBUART1_CONTROL APBUART1_BASE+0x8
#define APBUART1_PRESCALER APBUART1_BASE+0xc
#define APBUART2_BASE_LEON2 0x80000080 /* LEON2 */
#define APBUART2_BASE_GR712RC 0x80100100 /* LEON3-FT GR712RC */
#define APBUART2_BASE_GR740 0xFF901000 /* LEON4-N2X */
//
#define APBUART2_DATA APBUART2_BASE
#define APBUART2_STATUS APBUART2_BASE+0x4
#define APBUART2_CONTROL APBUART2_BASE+0x8
#define APBUART2_PRESCALER APBUART2_BASE+0xc
/* *************** */
/* TIMER CONSTANTS */
/* */
/* LEON timer ctrl register bits */
#define TMR_DISABLE 0x0
#define TMR_ENABLE 0x1
#define TMR_RELOAD 0x2
#define TMR_LOAD 0x4
#define TMR_IRQEN 0x8
#define TMR_RUN 0xf
#define TMR_PRESCALER_VALUE_10_1 0x9 /* 10MHz -> 1MHz */
#define TMR_PRESCALER_VALUE_25M_1M 0x18 /* 25MHz -> 1MHz */
#define TMR_PRESCALER_VALUE_12M500k_100k 0x7c /* 12.5MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_25M_100k 0xf9 /* 25MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_51M_100k 0x200 /* 51,28MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_50M_100k 0x1f3 /* 50MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_75M_100k 0x2ed /* 75MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_100M_100k 0x3e7 /* 100MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_100M_1M 0x63 /* 100MHz -> 1MHz */
#define TMR_PRESCALER_VALUE_150M_1M 0x95 /* 150MHz -> 1MHz */
#define TMR_PRESCALER_VALUE_250M_1M 0xf9 /* 250MHz -> 1MHz */
#define TMR_PRESCALER_VALUE_50_1 0x31 /* 50MHz -> 1MHz */
#define TMR_PRESCALER_VALUE_MIN 0x2 /* minimum value, %4 */
#define TMR_PRESCALER_VALUE_MAX 0x3ff /* maximum value (10-bit field), %2^10 */
//
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_12M500k_100k
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_25M_100k
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_50M_100k
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_51M_100k
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_75M_100k
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_100M_100k
#define TIMER_RELOAD_VALUE_10_1000 0x989680 /* 1MHz 10s */
#define TIMER_RELOAD_VALUE_1_25M 0x17d7840 /* 25MHz 1s */
#define TIMER_RELOAD_VALUE_1_51M 0x30e8083 /* 51,3MHz 1s */
#define TIMER_RELOAD_VALUE_1_50M 0x2faf07f /* 50MHz 1s */
#define TIMER_RELOAD_VALUE_1_75M 0x47868bf /* 75MHz 1s */
#define TIMER_RELOAD_VALUE_1_1M 0xf4240 /* 1MHz 1s */
#define TIMER_RELOAD_VALUE_1_100k 0x186a0 /* 100kHz 1s */
#define TIMER_RELOAD_VALUE_1_200 0x30d40 /* 1MHz 200ms */
#define TIMER_RELOAD_VALUE_SIM 0x10 /* value for simulation */
#define TIMER_RELOAD_VALUE_CLOCK 0xffffffff /* value to measure clock cycles */
//
//#define TIMER_RELOAD_VALUE TIMER_RELOAD_VALUE_CLOCK // TIMER_RELOAD_VALUE_SIM
#define TICKS_PER_SEC TIMER_RELOAD_VALUE_1_100k
#define APBTIMER1_BASE_LEON2 0x80000040
#define APBTIMER_BASE_GR712RC 0x80000300
#define APBTIMER_BASE_GR740 0xFF908000
#define APBTIMER_BASE_LEON4_N2X 0xFF908000
//
#define APBTIMER2_BASE_LEON2 0x80000050
//
#define GR712RC_TIMER_INIT 0x1200 // Disable timer freeze, the rest is default
#define GR740_TIMER_INIT 0x1200 // Disable timer freeze, the rest is default
#define LEON4_N2X_TIMER_INIT 0x1200 // Disable timer freeze, the rest is default
#define APBPRESCALER_BASE_LEON2 0x80000060
#define APBPRESCALER_BASE_GR712RC APBTIMER_BASE_GR712RC
#define APBPRESCALER_BASE_GR740 APBTIMER_BASE_GR740
#define APBPRESCALER_BASE_LEON4_N2X APBTIMER_BASE_LEON4_N2X
//
#define APBPRESCALER_COUNTER (APBPRESCALER_BASE)
#define APBPRESCALER_RELOAD (APBPRESCALER_BASE+0x4)
#define APBPIO_BASE_LEON2 0x800000A0
#define APBPIO_DIRECTION APBPIO_BASE_LEON2+0x4
#define DIRECTION_UARTS 0x0000AA00 /* UART1, UART2 */
#define APBINTCTRL_BASE_LEON2 0x80000090
#define APBINTCTRL_BASE_GR712RC 0x80000200
#define APBINTCTRL_BASE_GR740 0xFF904000
#define APBINTCTRL_BASE_LEON4_N2X 0xFF904000
#define TIMER_IRQ_LEON2 8
#define TIMER_IRQ_GR712RC 8
#define TIMER_IRQ_GR740 1
#define TIMER_IRQ_LEON4_N2X 1
#ifndef SYSCLK_PERIOD
#if (USEDBSP==BSP_GR740)
#define SYSCLK_PERIOD 250000000.0 // Hz
#elif (USEDBSP==BSP_LEON4_N2X)
#define SYSCLK_PERIOD 150000000.0 // Hz
#else
#define SYSCLK_PERIOD 100000000.0 // Hz
#endif
#endif
/* Fixed assignments vs. AMBA PnP */
#if ((USEDBSP==BSP_GR712RC)||(USEDBSP==BSP_GR740)||(USEDBSP==BSP_LEON4_N2X))
#define APBTIMER_CONFIG (APBTIMER1_BASE+0x8)
#define APBTIMER_LATCH_CONFIG (APBTIMER1_BASE+0xc)
#define APBTIMER1_COUNTER (APBTIMER1_BASE+0x10)
#define APBTIMER1_RELOAD (APBTIMER1_BASE+0x14)
#define APBTIMER1_CONTROL (APBTIMER1_BASE+0x18)
#define APBTIMER1_LATCH (APBTIMER1_BASE+0x1c)
#define APBTIMER2_COUNTER (APBTIMER1_BASE+0x20)
#define APBTIMER2_RELOAD (APBTIMER1_BASE+0x24)
#define APBTIMER2_CONTROL (APBTIMER1_BASE+0x28)
#define APBTIMER2_LATCH (APBTIMER1_BASE+0x2c)
#define APBWATCHDOG_COUNTER (APBTIMER1_BASE+0x20)
#define APBWATCHDOG_RELOAD (APBTIMER1_BASE+0x24)
#define APBWATCHDOG_CONTROL (APBTIMER1_BASE+0x28)
#define APBWATCHDOG_LATCH (APBTIMER1_BASE+0x2c)
#define APBINTCTRL_LEVEL (APBINTCTRL_BASE+0x0)
#define APBINTCTRL_MASK (APBINTCTRL_BASE+0x40)
#define APBINTCTRL_PENDING (APBINTCTRL_BASE+0x4)
#define APBINTCTRL_FORCE (APBINTCTRL_BASE+0x80)
#define APBINTCTRL_CLEAR (APBINTCTRL_BASE+0xc)
#define APBINTCTRL_CTL (APBINTCTRL_BASE+0x20)
#define APBINTCTRL_CSEL (APBINTCTRL_BASE+0x24)
#else
#define APBTIMER1_COUNTER (APBTIMER1_BASE)
#define APBTIMER1_RELOAD (APBTIMER1_BASE+0x4)
#define APBTIMER1_CONTROL (APBTIMER1_BASE+0x8)
#define APBTIMER1_WATCHDOG (APBTIMER1_BASE+0xc)
#define APBTIMER2_COUNTER (APBTIMER2_BASE)
#define APBTIMER2_RELOAD (APBTIMER2_BASE+0x4)
#define APBTIMER2_CONTROL (APBTIMER2_BASE+0x8)
#define APBTIMER2_WATCHDOG (APBTIMER2_BASE+0xc)
#define APBINTCTRL_MASK (APBINTCTRL_BASE+0x0)
#define APBINTCTRL_PENDING (APBINTCTRL_BASE+0x4)
#define APBINTCTRL_FORCE (APBINTCTRL_BASE+0x8)
#define APBINTCTRL_CLEAR (APBINTCTRL_BASE+0xc)
#endif
/* Board configurations */
#if USEDBSP==BSP_SIM
#warning USEDBSP = SIM
#define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_SIM /* 25MHz 9600bps */
#define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_100M_100k
#define TMR_RELOAD_VALUE TIMER_RELOAD_VALUE_1_1M
#define APBUART1_BASE APBUART1_BASE_LEON2
#define APBUART2_BASE APBUART2_BASE_LEON2
#define APBTIMER1_BASE APBTIMER1_BASE_LEON2
#define APBTIMER2_BASE APBTIMER2_BASE_LEON2
#define APBPRESCALER_BASE APBPRESCALER_BASE_LEON2
#define APBINTCTRL_BASE APBINTCTRL_BASE_LEON2
#define TIMER_IRQ TIMER_IRQ_LEON2
#elif USEDBSP==BSP_LEON2_MT
#warning USEDBSP = LEON2_MT
#define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_100_115200 /* 100MHz 115200bps */
#define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_100M_1M
#define TMR_RELOAD_VALUE TIMER_RELOAD_VALUE_1_1M
#define APBUART1_BASE APBUART1_BASE_LEON2
#define APBUART2_BASE APBUART2_BASE_LEON2
#define APBTIMER1_BASE APBTIMER1_BASE_LEON2
#define APBTIMER2_BASE APBTIMER2_BASE_LEON2
#define APBPRESCALER_BASE APBPRESCALER_BASE_LEON2
#define APBINTCTRL_BASE APBINTCTRL_BASE_LEON2
#define TIMER_IRQ TIMER_IRQ_LEON2
#elif USEDBSP==BSP_AT697
#warning USEDBSP = AT697
#define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_100_115200 /* 100MHz 115200bps */
#define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_100M_1M
#define TMR_RELOAD_VALUE TIMER_RELOAD_VALUE_1_1M
#define APBUART1_BASE APBUART1_BASE_LEON2
#define APBUART2_BASE APBUART2_BASE_LEON2
#define APBTIMER1_BASE APBTIMER1_BASE_LEON2
#define APBTIMER2_BASE APBTIMER2_BASE_LEON2
#define APBPRESCALER_BASE APBPRESCALER_BASE_LEON2
#define APBINTCTRL_BASE APBINTCTRL_BASE_LEON2
#define USE_BSP_INTERRUPTS 1
#define TIMER_IRQ TIMER_IRQ_LEON2
#elif USEDBSP==BSP_GR712RC
// #define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_48_9600 /* 48MHz 9600bps */
#define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_100_115200
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_100M_100k
#define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_100M_1M
#define TMR_RELOAD_VALUE TIMER_RELOAD_VALUE_1_1M
#define APBUART1_BASE APBUART1_BASE_GR712RC
#define APBUART2_BASE APBUART2_BASE_GR712RC
#define APBTIMER1_BASE APBTIMER_BASE_GR712RC
#define APBTIMER2_BASE APBTIMER_BASE_GR712RC
#define TIMER_INIT GR712RC_TIMER_INIT
#define APBPRESCALER_BASE APBPRESCALER_BASE_GR712RC
#define APBINTCTRL_BASE APBINTCTRL_BASE_GR712RC
#define USE_BSP_INTERRUPTS 1
#define TIMER_IRQ TIMER_IRQ_GR712RC
#elif USEDBSP==BSP_GR740
// #define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_150_9600 /* 48MHz 9600bps */
#define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_250_115200
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_250M_100k
#define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_250M_1M
#define TMR_RELOAD_VALUE TIMER_RELOAD_VALUE_1_1M
#define APBUART1_BASE APBUART1_BASE_GR740
#define APBUART2_BASE APBUART2_BASE_GR740
#define APBTIMER1_BASE APBTIMER_BASE_GR740
#define APBTIMER2_BASE APBTIMER_BASE_GR740
#define TIMER_INIT GR740_TIMER_INIT
#define APBPRESCALER_BASE APBPRESCALER_BASE_GR740
#define APBINTCTRL_BASE APBINTCTRL_BASE_GR740
#define USE_BSP_INTERRUPTS 1
#define TIMER_IRQ TIMER_IRQ_GR740
#elif USEDBSP==BSP_LEON4_N2X
// #define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_150_9600 /* 48MHz 9600bps */
#define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_150_115200
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_250M_100k
#define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_150M_1M
#define TMR_RELOAD_VALUE TIMER_RELOAD_VALUE_1_1M
#define APBUART1_BASE APBUART1_BASE_LEON4_N2X
#define APBUART2_BASE APBUART2_BASE_LEON4_N2X
#define APBTIMER1_BASE APBTIMER_BASE_LEON4_N2X
#define APBTIMER2_BASE APBTIMER_BASE_LEON4_N2X
#define TIMER_INIT LEON4_N2X_TIMER_INIT
#define APBPRESCALER_BASE APBPRESCALER_BASE_LEON4_N2X
#define APBINTCTRL_BASE APBINTCTRL_BASE_LEON4_N2X
#define USE_BSP_INTERRUPTS 1
#define TIMER_IRQ TIMER_IRQ_LEON4_N2X
#else
#error Any BSP is not selected.
#endif
#define cpu_reg_write(adr,byData) ((*(unsigned int volatile *)(adr))=byData)
#define cpu_reg_read(adrR) (*(unsigned int volatile *)(adrR))
/*********************************************************************/
void delay(int i);
void init_uart(void);
void init_timer(void);
void m_putchar(unsigned char s);
unsigned char m_getchar(void);
void m_print(unsigned char* s);
void i_print(int i);
void i_hexprint(unsigned i);
unsigned i_conv(char *s);
unsigned i_hexconv(char *s);
unsigned getval(unsigned char* s, unsigned base);
void dumpMem(unsigned count, void *address, unsigned len);
void dataError(void* a, unsigned sz, unsigned i, unsigned expected);
void timer_start(void);
void timer_stop(void);
unsigned int clock(void);
unsigned int get_time(unsigned int *sec);
#define NL m_putchar('\n')
#define SPC m_putchar(' ')
#endif