leon-myuart.h
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/* -----------------------------------------------------------------------------
* Copyright (C) 2015-2018 daiteq s.r.o. http://www.daiteq.com
*
* This program is distributed WITHOUT ANY WARRANTY; without even
* the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE.
*
* -----------------------------------------------------------------------------
* Filename : leon-myuart.h
* Authors : Martin Danek
* Description : leon2 uart I/O routines
* Release :
* Version : 1.0
* Date : 10.05.2018
* -----------------------------------------------------------------------------
*/
#ifndef LEON_MYUART_H
#define LEON_MYUART_H
/* Board definitions */
#define BSP_SIM 0
#define BSP_LEON2_MT 1
#define BSP_AT697 2
#define BSP_GR712RC 3
#define BSP_LEON4_N2X 4
#ifndef USEDBSP
#define USEDBSP BSP_LEON2_MT
#endif
/* *************** */
/* UART CONSTANTS */
/* */
#define DISABLE 0x0
#define ENABLE_RX 0x1
#define ENABLE_TX 0x2
#define RX_INT 0x4
#define TX_INT 0x8
#define EVEN_PARITY 0x20
#define ODD_PARITY 0x30
//
// baud_rate = F_clk /(8 * scaler_reload_value + 1)
// scaler_reload_value = ((F_clk/baud_rate) - 1) / 8
//
#define SCALER_RELOAD_VALUE_40_38400 0x80 /* 40MHz 38400bps */
#define SCALER_RELOAD_VALUE_25_9600 0x146 /* 100MHz 38400bps 25MHx 9600bps*/
#define SCALER_RELOAD_VALUE_48_9600 0x271 /* 48MHz 9600bps GR712RC */
#define SCALER_RELOAD_VALUE_50_115200 0x036 /* 50MHz 115200bps */
#define SCALER_RELOAD_VALUE_51_115200 0x038 /* 51.2821MHz 115200bps */
#define SCALER_RELOAD_VALUE_75_115200 0x051 /* 50MHz 115200bps */
#define SCALER_RELOAD_VALUE_100_115200 0x06C /* 100MHz 115200bps */
#define SCALER_RELOAD_VALUE_150_9600 0x7A1 /* 150MHz 9600bps */
#define SCALER_RELOAD_VALUE_200_9600 0xA2C /* 200MHz 9600bps */
#define SCALER_RELOAD_VALUE_200_115200 0x0D9 /* 200MHz 115200bps */
#define SCALER_RELOAD_VALUE_SIM 0x0a /* simulation */
#define LOOP_BACK 0x80
#define FLOW_CONTROL 0x40
// The following defines the bits in the LEON UART State Registers.
#define STAT_DR 0x00000001 /* Data Ready */
#define STAT_TS 0x00000002 /* TX Send Register Empty */
#define STAT_TH 0x00000004 /* TX Hold Register Empty */
#define STAT_BR 0x00000008 /* Break Error */
#define STAT_OE 0x00000010 /* RX Overrun Error */
#define STAT_PE 0x00000020 /* RX Parity Error */
#define STAT_FE 0x00000040 /* RX Framing Error */
#define STAT_ERR 0x00000078 /* Error Mask */
// The following defines the bits in the LEON UART Ctrl Registers.
#define CTRL_RE 0x00000001 /* Receiver enable */
#define CTRL_TE 0x00000002 /* Transmitter enable */
#define CTRL_RI 0x00000004 /* Receiver interrupt enable */
#define CTRL_TI 0x00000008 /* Transmitter interrupt enable */
#define CTRL_PS 0x00000010 /* Parity select */
#define CTRL_PE 0x00000020 /* Parity enable */
#define CTRL_FL 0x00000040 /* Flow control enable */
#define CTRL_LB 0x00000080 /* Loop Back enable */
#define CTRL_EC 0x00000100 /* External clock enable */
#define APBUART1_BASE_LEON2 0x80000070 /* LEON2 */
#define APBUART1_BASE_GR712RC 0x80000100 /* LEON3-FT GR712RC */
#define APBUART1_BASE_LEON4_N2X 0xFF900000 /* LEON4-N2X */
//
#define APBUART1_DATA APBUART1_BASE
#define APBUART1_STATUS APBUART1_BASE+0x4
#define APBUART1_CONTROL APBUART1_BASE+0x8
#define APBUART1_PRESCALER APBUART1_BASE+0xc
#define APBUART2_BASE_LEON2 0x80000080 /* LEON2 */
#define APBUART2_BASE_GR712RC 0x80100100 /* LEON3-FT GR712RC */
#define APBUART2_BASE_LEON4_N2X 0xFF901000 /* LEON4-N2X */
//
#define APBUART2_DATA APBUART2_BASE
#define APBUART2_STATUS APBUART2_BASE+0x4
#define APBUART2_CONTROL APBUART2_BASE+0x8
#define APBUART2_PRESCALER APBUART2_BASE+0xc
/* *************** */
/* TIMER CONSTANTS */
/* */
#define TMR_DISABLE 0x0
#define TMR_ENABLE 0x1
#define TMR_RELOAD 0x2
#define TMR_LOAD 0x4
#define TMR_RUN 0x7
/* LEON timer ctrl register bits */
#define TMR_CTRL_EN 0x00000001
#define TMR_CTRL_RL 0x00000002
#define TMR_CTRL_LD 0x00000004
#define TMR_PRESCALER_VALUE_10_1 0x9 /* 10MHz -> 1MHz */
#define TMR_PRESCALER_VALUE_25M_1M 0x18 /* 25MHz -> 1MHz */
#define TMR_PRESCALER_VALUE_12M500k_100k 0x7c /* 12.5MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_25M_100k 0xf9 /* 25MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_51M_100k 0x200 /* 51,28MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_50M_100k 0x1f3 /* 50MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_75M_100k 0x2ed /* 75MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_100M_100k 0x3e7 /* 100MHz -> 100kHz */
#define TMR_PRESCALER_VALUE_100M_1M 0x64 /* 100MHz -> 1MHz */
#define TMR_PRESCALER_VALUE_50_1 0x31 /* 50MHz -> 1MHz */
#define TMR_PRESCALER_VALUE_MIN 0x2 /* minimum value, %4 */
#define TMR_PRESCALER_VALUE_MAX 0x3ff /* maximum value (10-bit field), %2^10 */
//
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_12M500k_100k
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_25M_100k
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_50M_100k
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_51M_100k
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_75M_100k
// #define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_100M_100k
#define TIMER_RELOAD_VALUE_10_1000 0x989680 /* 1MHz 10s */
#define TIMER_RELOAD_VALUE_1_25M 0x17d7840 /* 25MHz 1s */
#define TIMER_RELOAD_VALUE_1_51M 0x30e8083 /* 51,3MHz 1s */
#define TIMER_RELOAD_VALUE_1_50M 0x2faf07f /* 50MHz 1s */
#define TIMER_RELOAD_VALUE_1_75M 0x47868bf /* 75MHz 1s */
#define TIMER_RELOAD_VALUE_1_1M 0xf4240 /* 1MHz 1s */
#define TIMER_RELOAD_VALUE_1_100k 0x186a0 /* 100kHz 1s */
#define TIMER_RELOAD_VALUE_1_200 0x30d40 /* 1MHz 200ms */
#define TIMER_RELOAD_VALUE_SIM 0x10 /* value for simulation */
#define TIMER_RELOAD_VALUE_CLOCK 0xffffffff /* value to measure clock cycles */
//
//#define TIMER_RELOAD_VALUE TIMER_RELOAD_VALUE_CLOCK // TIMER_RELOAD_VALUE_SIM
#define TICKS_PER_SEC TIMER_RELOAD_VALUE_1_100k
#define APBTIMER1_BASE_LEON2 0x80000040
//
#define APBTIMER1_COUNTER (APBTIMER1_BASE)
#define APBTIMER1_RELOAD (APBTIMER1_BASE+0x4)
#define APBTIMER1_CONTROL (APBTIMER1_BASE+0x8)
#define APBTIMER1_WATCHDOG (APBTIMER1_BASE+0xc)
#define APBTIMER2_BASE_LEON2 0x80000050
//
#define APBTIMER2_COUNTER (APBTIMER2_BASE)
#define APBTIMER2_RELOAD (APBTIMER2_BASE+0x4)
#define APBTIMER2_CONTROL (APBTIMER2_BASE+0x8)
#define APBTIMER2_WATCHDOG (APBTIMER2_BASE+0xc)
#define APBPRESCALER_BASE_LEON2 0x80000060
//
#define APBPRESCALER_COUNTER (APBPRESCALER_BASE)
#define APBPRESCALER_RELOAD (APBPRESCALER_BASE+0x4)
#define APBPIO_BASE_LEON2 0x800000A0
#define APBPIO_DIRECTION APBPIO_BASE_LEON2+0x4
#define DIRECTION_UARTS 0x0000AA00 /* UART1, UART2 */
#define APBINTCTRL_BASE_LEON2 0x80000090
#define APBINTCTRL_MASK (APBINTCTRL_BASE+0x0)
#define APBINTCTRL_PENDING (APBINTCTRL_BASE+0x4)
#define APBINTCTRL_FORCE (APBINTCTRL_BASE+0x8)
#define APBINTCTRL_CLEAR (APBINTCTRL_BASE+0xc)
/* Board configurations */
#if USEDBSP==BSP_SIM
#warning USED_BSP = SIM
#define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_SIM /* 25MHz 9600bps */
#define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_100M_100k
#define TMR_RELOAD_VALUE TIMER_RELOAD_VALUE_1_1M
#define APBUART1_BASE APBUART1_BASE_LEON2
#define APBUART2_BASE APBUART2_BASE_LEON2
#define APBTIMER1_BASE APBTIMER1_BASE_LEON2
#define APBTIMER2_BASE APBTIMER2_BASE_LEON2
#define APBPRESCALER_BASE APBPRESCALER_BASE_LEON2
#define APBINTCTRL_BASE APBINTCTRL_BASE_LEON2
#elif USEDBSP==BSP_LEON2_MT
#warning USED_BSP = LEON2_MT
// #define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_25_9600 /* 25MHz 9600bps */
#define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_100_115200
#define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_100M_100k
#define TMR_RELOAD_VALUE TIMER_RELOAD_VALUE_1_1M
#define APBUART1_BASE APBUART1_BASE_LEON2
#define APBUART2_BASE APBUART2_BASE_LEON2
#define APBTIMER1_BASE APBTIMER1_BASE_LEON2
#define APBTIMER2_BASE APBTIMER2_BASE_LEON2
#define APBPRESCALER_BASE APBPRESCALER_BASE_LEON2
#define APBINTCTRL_BASE APBINTCTRL_BASE_LEON2
#elif USEDBSP==BSP_AT697
#warning USED_BSP = AT697
#define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_100_115200 /* 100MHz 115200bps */
#define TMR_PRESCALER_VALUE TMR_PRESCALER_VALUE_100M_1M
#define TMR_RELOAD_VALUE TIMER_RELOAD_VALUE_1_1M
#define APBUART1_BASE APBUART1_BASE_LEON2
#define APBUART2_BASE APBUART2_BASE_LEON2
#define APBTIMER1_BASE APBTIMER1_BASE_LEON2
#define APBTIMER2_BASE APBTIMER2_BASE_LEON2
#define APBPRESCALER_BASE APBPRESCALER_BASE_LEON2
#define APBINTCTRL_BASE APBINTCTRL_BASE_LEON2
#define USE_BSP_INTERRUPTS
#elif USEDBSP==BSP_GR712RC
#define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_48_9600 /* 48MHz 9600bps */
#define APBUART1_BASE APBUART1_BASE_GR712RC
#define APBUART2_BASE APBUART2_BASE_GR712RC
#define APBTIMER1_BASE 0x0
#define APBTIMER2_BASE 0x0
#define APBPRESCALER_BASE 0x0
#elif USEDBSP==BSP_LEON4_N2X
#define SCALER_RELOAD_VALUE SCALER_RELOAD_VALUE_150_9600 /* 48MHz 9600bps */
#define APBUART1_BASE APBUART1_BASE_LEON4_N2X
#define APBUART2_BASE APBUART2_BASE_LEON4_N2X
#define APBTIMER1_BASE 0x0
#define APBTIMER2_BASE 0x0
#define APBPRESCALER_BASE 0x0
#else
#error Any BSP is not selected.
#endif
#define cpu_reg_write(adr,byData) ((*(unsigned int volatile *)(adr))=byData)
#define cpu_reg_read(adrR) (*(unsigned int volatile *)(adrR))
/*********************************************************************/
void delay(int i);
void init_uart(void);
void init_timer(void);
void m_putchar(unsigned char s);
unsigned char m_getchar(void);
void m_print(unsigned char* s);
void i_print(int i);
void i_hexprint(unsigned i);
unsigned i_conv(char *s);
unsigned i_hexconv(char *s);
unsigned getval(unsigned char* s, unsigned base);
void dumpMem(unsigned count, void *address, unsigned len);
void dataError(void* a, unsigned sz, unsigned i, unsigned expected);
void timer_start(void);
void timer_stop(void);
unsigned int clock(void);
unsigned int get_time(unsigned int *sec);
#define NL m_print("\n")
#define SPC m_print(" ")
#endif