desk_swar.inc
2.7 KB
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/* SWAR accumulator */
union swaraccum {
struct {
uint32_t lo;
uint32_t hi;
} u32;
uint64_t u64;
} swar_accum[4];
static unsigned swar_ctrl = 0;
#define op_swar(A,B,RES) \
do { \
unsigned b; \
switch(swar_ctrl & 0xFF) { \
case SW_OP_ADD: case SW_OP_SUB: case SW_OP_MUL: \
if (swar_ctrl & SW_CTRL_AUDIO) b = 16; \
else if (swar_ctrl & SW_CTRL_VIDEO) b = 8; \
else b = 4; \
RES = swar_alu(A, B, 32/b, b, swar_ctrl, swar_ctrl & SW_CTRL_SIGNED, \
swar_ctrl & SW_CTRL_SATURATE, \
swar_ctrl & SW_CTRL_REDUCE, (uint32_t *)&swar_accum); \
break; \
case SW_OP_COR1b: case SW_OP_COR2b: case SW_OP_COR3b: case SW_OP_COR4b: \
b = (swar_ctrl & 0xFF)-SW_OP_COR1b+1; \
RES = swar_corr(A, B, 32/b, b, swar_ctrl & SW_CTRL_SIGNED, swar_ctrl & SW_CTRL_REDUCE, (uint32_t *) &swar_accum); \
break; \
} \
} while(0)
/*
#define op_swarcc(A,B,RES) \
asm volatile ( \
"swarcc %0,%1,%2\n" \
: "=r"(RES) \
: "r"(A), "r"(B) \
)
*/
#define op_set_ctrl(A) \
do { \
swar_ctrl = A; \
swar_accum[0].u64 = 0; \
swar_accum[1].u64 = 0; \
swar_accum[2].u64 = 0; \
swar_accum[3].u64 = 0; \
} while(0)
#define op_get_stat(RES) \
RES = swar_ctrl
#define op_get_acc0(RES) \
RES = swar_accum[0].u32.lo
#define op_get_acc0hi(RES) \
RES = swar_accum[0].u32.hi
#define op_get_acc1(RES) \
RES = swar_accum[1].u32.lo
#define op_get_acc1hi(RES) \
RES = swar_accum[1].u32.hi
#define op_get_acc2(RES) \
RES = swar_accum[2].u32.lo
#define op_get_acc2hi(RES) \
RES = swar_accum[2].u32.hi
#define op_get_acc3(RES) \
RES = swar_accum[3].u32.lo
#define op_get_acc3hi(RES) \
RES = swar_accum[3].u32.hi